Implementation of the Least-Squares Lattice with Order and Forgetting Factor Estimation for FPGA
نویسندگان
چکیده
منابع مشابه
Implementation of the Least-Squares Lattice with Order and Forgetting Factor Estimation for FPGA
A high performance RLS lattice filter with the estimation of an unknown order and forgetting factor of identified system was developed and implemented as a PCORE coprocessor for Xilinx EDK. The coprocessor implemented in FPGA hardware can fully exploit parallelisms in the algorithm and remove load from a microprocessor. The EDK integration allows effective programming and debugging of hardware ...
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ژورنال
عنوان ژورنال: EURASIP Journal on Advances in Signal Processing
سال: 2008
ISSN: 1687-6180
DOI: 10.1155/2008/394201